startup.c

Для начала определим 15 векторов (14 основных и 1 сброса) процессорного ядра:
/* Core interrupts */
    reset_handler,      /*!#0 cortex-m4 reset interrupt begin code of this */
    0,                  /*!#1 cortex-m4 non maskable interrupt */
    0,                  /*!#2 cortex-m4 hardware fault interrupt */
    0,                  /*!#3 cortex-m4 memory management interrupt */
    0,                  /*!#4 cortex-m4 bus fault interrupt */
    0,                  /*!#5 cortex-m4 usage fault interrupt */
    0,                  /*!#6 reserved */
    0,                  /*!#7 reserved */
    0,                  /*!#8 reserved */
    0,                  /*!#9 reserved */
    0,                  /*!#10 cortex-m4 system service interrupt */
    0,                  /*!#11 cortex-m4 debug monitor interrupt */
    0,                  /*!#12 reserved */
    0,                  /*!#13 cortex-m4 penable request for system service interrupt */
    0,                  /*!#14 cortex-m4 system tick timer interrupt */

После этого определим внешние(по отношению к ядру) вектора прерывания периферии:
    /* External Interrupts */
    0,                  /*!%0 Window WatchDog              */                                       
    0,                  /*!%1 PVD through EXTI Line detection */                       
    0,                  /*!%2 Tamper and TimeStamps through the EXTI line */           
    0,                  /*!%3 RTC Wakeup through the EXTI line */                     
    0,                  /*!%4 FLASH                        */                                         
    0,                  /*!%5 RCC                          */                                           
    0,                  /*!%6 EXTI Line0                   */                       
    0,                  /*!%7 EXTI Line1                   */                         
    0,                  /*!%8 EXTI Line2                   */                         
    0,                  /*!%9 EXTI Line3                   */                         
    0,                  /*!%10 EXTI Line4                   */                         
    0,                  /*!%11 DMA1 Stream 0                */                 
    0,                  /*!%12 DMA1 Stream 1                */                  
    0,                  /*!%13 DMA1 Stream 2                */                  
    0,                  /*!%14 DMA1 Stream 3                */                  
    0,                  /*!%15 DMA1 Stream 4                */                  
    0,                  /*!%16 DMA1 Stream 5                */                  
    0,                  /*!%17 DMA1 Stream 6                */                  
    0,                  /*!%18 ADC1, ADC2 and ADC3s         */                  
    0,                  /*!%19 CAN1 TX                      */                        
    0,                  /*!%20 CAN1 RX0                     */                         
    0,                  /*!%21 CAN1 RX1                     */                         
    0,                  /*!%22 CAN1 SCE                     */                         
    0,                  /*!%23 External Line[9:5]s          */                         
    0,                  /*!%24 TIM1 Break and TIM9          */        
    0,                  /*!%25 TIM1 Update and TIM10        */        
    0,                  /*!%26 TIM1 Trigger and Commutation and TIM11 */
    0,                  /*!%27 TIM1 Capture Compare         */                         
    0,                  /*!%28 TIM2                         */                  
    0,                  /*!%29 TIM3                         */                  
    0,                  /*!%30 TIM4                         */                  
    0,                  /*!%31 I2C1 Event                   */                         
    0,                  /*!%32 I2C1 Error                   */                         
    0,                  /*!%33 I2C2 Event                   */                         
    0,                  /*!%34 I2C2 Error                   */                           
    0,                  /*!%35 SPI1                         */                  
    0,                  /*!%36 SPI2                         */                  
    0,                  /*!%37 USART1                       */                  
    0,                  /*!%38 USART2                       */                  
    0,                  /*!%39 USART3                       */                  
    0,                  /*!%40 External Line[15:10]s        */                         
    0,                  /*!%41 RTC Alarm (A and B) through EXTI Line */                
    0,                  /*!%42 USB OTG FS Wakeup through EXTI line */                      
    0,                  /*!%43 TIM8 Break and TIM12         */        
    0,                  /*!%44 TIM8 Update and TIM13        */        
    0,                  /*!%45 TIM8 Trigger and Commutation and TIM14 */
    0,                  /*!%46 TIM8 Capture Compare         */                         
    0,                  /*!%47 DMA1 Stream7                 */                         
    0,                  /*!%48 FSMC                         */                  
    0,                  /*!%49 SDIO                         */                  
    0,                  /*!%50 TIM5                         */                  
    0,                  /*!%51 SPI3                         */                  
    0,                  /*!%52 UART4                        */                  
    0,                  /*!%53 UART5                        */                  
    0,                  /*!%54 TIM6 and DAC1&2 underrun errors */                  
    0,                  /*!%55 TIM7                         */
    0,                  /*!%56 DMA2 Stream 0                */                  
    0,                  /*!%57 DMA2 Stream 1                */                  
    0,                  /*!%58 DMA2 Stream 2                */                  
    0,                  /*!%59 DMA2 Stream 3                */                  
    0,                  /*!%60 DMA2 Stream 4                */                  
    0,                  /*!%61 Ethernet                     */                  
    0,                  /*!%62 Ethernet Wakeup through EXTI line */                    
    0,                  /*!%63 CAN2 TX                      */                         
    0,                  /*!%64 CAN2 RX0                     */                         
    0,                  /*!%65 CAN2 RX1                     */                         
    0,                  /*!%66 CAN2 SCE                     */                         
    0,                  /*!%67 USB OTG FS                   */                  
    0,                  /*!%68 DMA2 Stream 5                */                  
    0,                  /*!%69 DMA2 Stream 6                */                  
    0,                  /*!%70 DMA2 Stream 7                */                  
    0,                  /*!%71 USART6                       */                   
    0,                  /*!%72 I2C3 event                   */                         
    0,                  /*!%73 I2C3 error                   */                         
    0,                  /*!%74 USB OTG HS End Point 1 Out   */                  
    0,                  /*!%75 USB OTG HS End Point 1 In    */                  
    0,                  /*!%76 USB OTG HS Wakeup through EXTI */                        
    0,                  /*!%77 USB OTG HS                   */                  
    0,                  /*!%78 DCMI                         */                  
    0,                  /*!%79 CRYP crypto                  */                  
    0,                  /*!%80 Hash and Rng                 */
    0,                  /*!%81 FPU                          */

Всего их в нашем мк 82, как видно они затрагивают различные блоки мк.

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